This invention relates to a semiconductor device having the function of a conductivity-modulation type MOSFET combined with a bipolar transistor, which semiconductor device minimizes inductance of wiring connections between individual elements of the semiconductor device.
FIG. 2 represents a circuit combining MOSFETs with a bipolar transistor for realizing bipolar operation of the circuit. In FIG. 2, a first n-channel MOSFET 21 is connected between an emitter and an emitter terminal E of an NPN bipolar transistor 20. A second n-channel MOSFET 22 and a third n-channel MOSFET 23 are connected in series between the emitter terminal E and a collector terminal C. In addition, the gates of the first MOSFET 21 and the third MOSFET 23 are connected to a common gate terminal G. Finally, the gate of the second MOSFET 22 is connected to a connecting point of the drain of the second MOSFET 22 and the source of the third MOSFET 23, and this connecting point is in turn connected to the base of the bipolar transistor 20.
Application of a constant voltage equal to or greater than the threshold voltage to the common gate terminal G of the first and the third n-channel MOSFETs 21 and 23 causes both MOSFETs to become conductive. When these MOSFETs become conductive, a base current flows into the base layer of the NPN transistor 20, causing a heavy current to flow between the terminals C and E of the NPN transistor 20. When the MOSFETs 21 and 23 are subsequently turned OFF while a heavy current flows in the transistor 20, the voltage applied to the gate of the second MOSFET 22 increases due to an excessive quantity of holes in the transistor 20. This causes a conductivity modulation to occur, whereby the MOSFET 22 becomes conductive. Consequently, the holes in the transistor 20 are extracted through the MOSFET 22, resulting in an increased switching speed of the transistor 20 in comparison to a circuit of FIG. 2 without the MOSFET 22.
FIG. 3 represents another circuit combining MOSFETs with a bipolar transistor for realizing bipolar operation of the circuit. In this circuit, a p-channel MOSFET 24 is utilized instead of the second n-channel MOSFET 22 of FIG. 2, and the gate of the MOSFET 24 is connected to the gate terminal G in common with the gates of the first n-channel MOSFET 21 and the third n-channel MOSFET 23.
Application of a constant voltage equal to or greater than the threshold voltage to the common gate terminal G of the n-channel MOSFETs 21 and 23 and the p-channel MOSFET 24 causes the n-channel MOSFETs 21 and 23 to become conductive and the p-channel MOSFET 24 to become nonconductive. When the MOSFETs 21 and 23 become conductive, a base current flows into the base layer of the NPN transistor 20, and a heavy current flows between the terminals C and E of the transistor 20. Subsequently, when the voltage applied to the gate terminal G is gradually lowered while the transistor 20 is conductive, the MOSFETs 21 and 23 become nonconductive and the MOSFET 24 becomes conductive. Consequently, the holes in the transistor 20 are extracted through the MOSFET 24, resulting in an increased switching speed of the transistor 20 in comparison to a circuit of FIG. 3 without the MOSFET 24.
The circuits shown in FIGS. 2 and 3 produce voltage spikes and oscillations during the switching period due to inductance of wirings connecting individual elements of the semiconductor device. Consequently, expected characteristics of the semiconductor device cannot be fully obtained.
It is an object of the present invention to provide a semiconductor device having the function of a conductivity-modulation type MOSFET with reduced turn-OFF time, which device has extremely small inductance of wiring connections between individual elements of the semiconductor device, thereby eliminating voltages spikes and oscillation during switching operation.